1. Field of the Invention
This invention relates to integrated circuits, and in particular to a method of fabricating a compact bipolar memory cell and the resulting structure.
2. Description of the Prior Art
Several types of integrated bipolar transistor memory cells are known. In such structures the transistors which comprise the flip flop of the memory cell are electrically connected together by metal and/or polycrystalline silicon electrodes. A typical prior art structure is shown in "1024 BIT ECL RAM with 15 ns Access Time," by R. Rathbone et al., International Solid State Circuits Conference 1976, pages 188-189. All such prior art structures, however, have typically occupied an undesirably large area of the semiconductor material in which they are fabricated because of the difficulty of compactly interconnecting the transistors and providing associated load elements, usually other transistors or diodes, without consuming additional surface area of the semiconductor material.
Bit line powered bipolar memory cells are also known. For example, William Herndon in U.S. Pat. No. 4,032,902 entitled "Semiconductor Memory Cell Circuit and Structure" teaches fabrication of a bit line powered bipolar memory cell having four transistors. Jan Lohstroh, in "Static Bipolar RAM Cell with Compact Punch-Through Loads," Digest of Technical Papers, 1979 IEEE International Solid-State Circuits Conference, pages 14-15, teaches fabrication of a static bipolar memory cell having non-linear load devices. The Lohstroh circuit, however, uses punch-through diodes, and requires an unusual power supply It also occupies an undesirably large area of semiconductor material.